Category Archives: Analog Circuits

Office Tomfoolery

So Monday at work I successfully pulled a prank on the designer for the part that is currently occupying the majority of my time. Concept, planning, and execution took about two weeks or so as I had to fit this little side project in around my real work obviously. Ever since the part’s inception this designer had been claiming it was perfectly designed and any errors were clearly the fault of me, the Applications Engineer. He wasn’t being mean or anything, this sort of good-natured rivalry is pretty common between the Apps and Design departments at work, but being that this is my first part as lead apps since starting a year ago meant I got some extra abuse. I figured it would be a good idea to go on the offensive and show everyone I wasn’t such an easy target. My boss, who’s been good friends with the designer for a long time now, thought it would be pretty funny and approved the gag, eager to see how it would play out.

The part is a single phase buck regulator meant for Vcore applications in laptops and ultrabooks. Vcore means that the regulator provides the main voltage rail to the processor, specifically an Intel one in this case as AMD and other processors have different power requirements. My goal was to somehow screw with the regulator, cause the output voltage to glitch and go out of spec, and convince the designer this was a silicon bug and not a board issue. After a little brain storming I came up with the following circuit which could be cobbled together out of various parts in the lab:

Prank Circuit

My Prank Circuit

Without diving down the rabbit hole that is regulator compensation, the comp pin of any buck converter is the output of an error amplifier which connects to a networks of passives going back to its negative terminal (the Feedback pin) and is part of the control loop used to keep the output voltage stable and well-regulated. My circuit would periodically drive this pin away from its steady state operating point. This disturbance would propagate through the chip and result in a noticeable glitch on the output voltage until the compensation loop could regain control and bring the output voltage back into spec.

As phase switches merrily along at the frequency and duty cycle set by the controller it gets divided down by R1 and R2. When phase is high the output of this voltage divider is enough to forward bias the diode and cause current to flow into C1 for a brief period before going low again. C1, which also connects to the positive input comparator U1, charges over time and when the voltage across the cap gets to be higher than the reference voltage present on the comparator’s negative input the comparator’s output swings to 5V. When U1′s output goes high two things happen. One, comp is driven away from steady state through R5 and two, the gate of M1 goes high which discharges C1 below the reference voltage starting the cycle over again.

Prank Sims

Prank Circuit Sim Results (Click to view properly)

There really wasn’t much thought process behind the component values in my circuit; they were determined through trial and error in simulation. I didn’t care how often the circuit would trigger, only that it did and the disturbances it caused would appear on Vout. One of my only goals was to ensure that the resistor dividers wouldn’t draw enough current to interfere with the normal operation of the regulator and cause it not to start up. My second goal was to “break” the regulator just enough to cause concern but not enough to trigger any of various over voltage, current, or temperature protections built into the chip. This is why R5 had to be added; without it comp was driven too hard and the part simply shutdown (there’s no fun in that).

With the circuit idea solidified I headed into the lab to jury rig it into place underneath one of the eval boards. It was a messy hour after work one day, but I successfully placed each component and wired in the various signals and voltages from all across the board. Once things got going, there would be so many cables and probes attached to the board I knew it wouldn’t get turned over until I was ready to reveal what I’d done.

 

Holding my breath I powered up the board after making all the necessary modifications. Surprisingly enough it worked! I hadn’t made any disastrous mistakes when wiring it all up and the resulting waveforms basically match with my sims. All that was needed was some tweaking of R5 to find the right value and I was ready for action.

Cutting to Monday morning, I spent a little time taking scope captures of a good board and my doctored eval board. These were placed in a quick report which I shot off to my boss and the designer right after lunch. To add to the joke I took my clean scope caps using a part from an old rev of silicon and explained how the “bug” was only seen in the latest version of the chip. This caused the initial spark of concern in the designer as we’re currently waiting on a new rev of the chip to arrive from the fab and it was too late to make any changes. After getting some tests to run and tweaks to try, I actually went into the lab and did them! For one I was curious to see if any of them could actually fix the error (they didn’t) and secondly, this designer is pretty hands on and likes to come out to Apps Lab quite often. I knew that if he came out to see the glitch on the bench and none of his changes were made he would get suspicious. Fortunately, or unfortunately, other obligations kept him away for the day and he never came out to see the problem until the end of the day.

After running the initial list of tests the designer gave me I had a flash of brilliance that really threw him for a loop. I took a series of scope shots at each of the four switching frequencies our part could run at and varied the value of R5 at each one. Now I had created a problem that went away as switching frequency increased and could explain why we hadn’t seen this issue before as the majority of our testing had taken place at high frequency up until this point! Bingo.

By the end of the day, the designer was pretty much stumped. He’d done an initial check of his schematics, couldn’t spot an obviously fault he made, but thought it was a mistake somewhere in the core of the modulator. He told me that at this point he essentially resigned himself to hoping the new version of the chip came out okay and whatever changes he made would happen to fix this (remember it’s too late to make changes now as the part’s being fabricated).

Right afterwards I called him into the lab saying I’d found something interesting and he should come take a look. When I showed him the circuit on back of the board he didn’t get it at first. He asked why all this crap was added and what did it fix? I couldn’t hold back anymore and broke out in a smile and said that I just wanted to mess with him. Slowly realization dawned on him and he started laughing as did my boss and a few other guys in the lab who were in on the joke.

In the end the designer took it really well and thought it was pretty funny. He told my boss to give me more work as clearly I didn’t have enough to do since I could pull these elaborate pranks but mostly he just laughed. I now owe him a round or two the next time a bunch of us go out after work but that’s a price I’m more than willing to pay all things considered. In the end I caused him just enough trouble so he started to sweat but not enough to take him away from any real tasks he had to get done. A well executed prank overall in my opinion. Surely, there’s no way this will every come back to haunt me right?


Jim Williams, AN13, & Op Amp Wizardry

Not too long ago I was reading through one of Jim Williams’ famous App Notes, AN13, High Speed Comparator Techniques. It’s an older App Note that was published back in 1985 and I didn’t really have a specific reason for reading it other than thinking it looked interesting and I wanted to learn more about comparators. For a comprehensive overview of AN13 I recommend reading Dr. Lundberg’s (aka Dr. Analog) three part summary over on his blog Reading Jim Williams.

The first section of AN13 is extremely informative and makes the app note well worth the read in my opinion. Entitled “The Rouges Gallery of High Speed Comparator Problems” this portion of the app note highlights common pitfalls of comparator circuits including bypassing, ground planes, probe compensation, and much more. As useful as The Rouges Gallery is what intrigues me the most in AN13 doesn’t actually have anything to do with comparators and is found in the first circuit of the Applications Section. The overall circuit is a Voltage to Frequency Converter shown in Figure 16 of AN13 and reproduced below with the part that fascinates me most boxed in red.

What Jim Williams has done is replace the input stage of A1, the LT318A, with a pair of 2N4393 JFETs. These JFETs drive the output stage of A1 via the two Comp pins of the amplifier. A1′s true inputs are shutdown by shorting them directly to the -15V supply leaving the rest of the amplifier free to serve Williams’ needs for this particular application. According to page 8 of the app note this trick was done “for low bias, high-speed operation.”  Now I don’t have a whole lot of experience using op amps with Comp pins to begin with let alone understand their internal architecture enough to hack them like Jim did. As far as I knew something like this wasn’t even possible and it definitely wasn’t brought up in any of the classes I took in school! Needless to say, upon seeing it done here in AN13 I was a little stunned.

After my initial shock I decided to look at the LT318A a little more closely to try to see how Jim Williams had pulled off this neat little trick. Linear Tech is usually pretty good about providing schematics  of their op amps with a description in their datasheets and I was hoping this was the case with the 318. As it turns out, the LT318A datasheet is a bit sparse compared to other datasheets from Linear but fortunately for me it does contain a schematic of the part. Unfortunately for me, it doesn’t appear to be a simplified version and there isn’t a functional description. Looking at the schematic in detail I could tell this wasn’t the basic op-amp architecture I was used to dealing with but I decided to dive in anyways. I’ve copied the LT318A schematic here and marked it up into functional blocks as best as I’m able to but if anyone out there has more info on this op amp or sees somewhere that I went wrong please let me know.

From studying the datasheet schematic of the LT318A I was able to understand more of how Jim’s op amp hack works. Connecting the amps inputs on pins 2 and 3 to the negative rail turns off the differential amplifier, the heart of which are the input transistors Q1-Q4 with Q13 and Q14 being the active loads. As a side note there may be some common-mode feedback on the diff pair but I’m not 100% sure. Thinking about what was said in the app note I would have to assume using two JFETs in place of the input circuit on the op amp would lower bias requirements and cutting out all those transistors speeds up operation of the overall application circuit.

The output from the input differential stage is then fed into what I assume to be a second gain stage  (not sure what Q21 does, this may be a weird folded cascode configuration too). From Figure 16 in AN13, you can see that Jim Williams has the JFET input transistors driving pins 1 and 5 on the LT318A. Sure enough these two pins correspond to the output of the diff pair on the amplifier and feed directly into the second gain stage. Following the gain stage comes what appears to be a Class AB output stage.

I enjoyed this little exercise of trying to understand some of Jim Williams’ techniques. While I may not have exactly figured out how the LT318A works I feel I did understand the high-level thought process behind this neat little trick. I also saw that my BJT design skills are a little rusty and that perhaps I should dust off Gray & Meyer or Sedra-Smith and brush up on the topic. Who knows, there could be a revisit to this post in the future…

Any neat op amp hacks of your own? See a mistake in my analysis of the LT318A? Let me know in the comments. Oh, and Happy New Year!


Expanding the Analog Geek’s Toolkit

So I spent the other weekend in Washington, D.C. visiting a friend for his birthday. While I was waiting for my plane to take off in RDU Alan over at Tektronix was kind enough to provide me with some pre-flight entertainment. Back in 1987, Alan assembled The Ultimate Analog Engineer’s Toolkit designed to provide solace to engineers dealing with such problems as noise, the Miller Effect, and management, among other things. My personal favorites were the box of dBs (positive and negative flavors of course) and the Parasitic Pesticide. I tried to order some samples directly from Alan himself but he said his stock has run dry. I hope he can get another shipment delivered in time for the holiday season.

Anyways, as I was sitting in the terminal after reading it and I started to come up with a few additions to the toolkit and I present them to you here.

The Low Flow Current Adapter – We’re all familiar with the low flow shower heads installed in bathrooms nationwide to reduce water consumption. The Low Flow Current Adapter works in much the same way only on current instead of H2O. Plug this bad boy in between the power source and your circuit and watch as your product’s power consumption plummets before your very eyes.

Frequency Shaper Tool - Sometimes designs run over budget and when this happens you can’t always afford the box of high quality dBs needed to make a circuit meet the required specs placing a lot of “hertz” on you the designer. This is where the patented Frequency Shaper Tool comes in handy. While not as precise as a Box of dBs its low cost and reliable performance makes it ideal for the engineer on a budget. The Shaper allows a designer to grab a hold of an amplifier or filter’s frequency response and bend it to the desired shape. Need to nudge a zero in the stop band? Squeeze just a little more rolloff out of a filter? Reach for the Frequency Shaper and bend a transfer function into submission.

DocuGel – Come across an old PCB, product, or IC and have no idea what it does or how to use it? Did someone who’s clearly not as bright as you are forget to document their work and now the burden to upgrade the device is on you? Spread some DocuGel on the offending product and leave it sit overnight on your bench. Return the next morning and find datasheets, BOMs, gerber files, and schematics laying on your bench!

Grounding Stakes- Nasty PCB layout causing you problems? Is your circuit’s performance suffering at the hands of ground refusing to sit at 0V? Pound a ground stake into an open portion of your board and watch your problems disappear. Let your circuit know you only accept 0V, no more, no less.

I accept checks and all major credit cards :-)


Transistor Latching Circuits: Improvement

This journey began back in Part 1 with me discussing the theory behind the transistor latch used by Dino at Hack a Week back in August.  Next it progressed to recreating Dino’s circuit using components I had on hand in Part 2.  Originally, the circuit I built didn’t work at all and I was able to narrow the problem down to leakage current in the base of the transistors.  Knowing what I was up against finally, our story concludes as I set out to improve upon the latching circuit.

Figure 3: Transistor Latch Using FETs

Figure 3 shows my first method of improving the transistor latch, losing the BJTs all together.  Since the 2N3904s and 2N3906s were drawing too much leakage current in the first place and setting off the latch randomly I decide they had to go.  What type of transistor could I use instead of a BJT that draws little to no leakage current?  Why a MOSFET of course. The gate leakage current of the only FETs I had on hand, the ALD1103 transistor array, was spec’d between 1 and 50pA, orders of magnitude less than the BJTs used before.  Surely such a small current wouldn’t cause the latch to turn on when it wasn’t supposed to.  After breadboarding the revised circuit using the ALD1103 I found that the circuit was much more consistent in its operation.  The only real changes to the circuit I had to make were the addition of bypass caps on the supply (not shown above, sorry) and tweaking the value of R8 (boxed in blue above) to 39kΩ.  While the latch worked well enough keeping R8 at 1MΩ I found that lowering its value caused many less false triggers.

Now that I had a functioning latch finally I decided to challenge myself. I wanted to see if I could go back and make a working latch using the “inferior” BJTs.  There were a few ideas floating around in my head on how to go about doing such a thing and Figure 4 below gives my best solution.  Since the base leakage current from Q3 through the 1MΩ resistor was causing most, if not all, of my problems the first time around my focus was now to minimize the effect that leakage could have on the overall operation of the circuit.

Figure 4: Improved Latch Using BJTs

Looking at Figure 4, one can see that R8 has been replaced with a fourth BJT.  Q3 and Q4 (boxed in orange above) form what’s called a simple current mirror (or current source depending on how you want to look at things but I digress) with Q4 configured as a diode connected transistor.  Note that when adding the simple current mirror to the latch the diode connected transistor MUST be located where Q4 is in the circuit.  With the diode connection Q4 acts like a standard diode with its anode at 9V meaning that at least in this application, it always looks forward biased. Diode connecting Q3 instead gives a constant path for current to flow from 9V to ground (via diode connected Q3, R4, and R5) and so the circuit will never turn off.  In an IC this would mean that a start up circuit would be unnecessary (typically a good thing) but in the case of the latch that’s exactly the opposite of what we want.  Placing the diode connection on Q4 means that even though it looks forward biased, current doesn’t flow through that branch of the bias network since the collector of Q1 would float high as Q1 itself is turned off.

Powering up this new circuit showed great improvement over my previous attempts to build a latch using BJTs.  Most of the time the latch was only triggering when I toggled the pushbutton.  With the main leakage problem taken care of I then began to look at Q1.  Ignoring R6 for a moment, Q1 looked an awful lot like how Q3 was configured with the 1MΩ resistor back in Figure 1 which had me thinking about leakage through this transistor.  Reducing the resistance of R5 down to 56kΩ (via trial and error) further improved the circuit’s reliability and I hardly ever saw a false trigger when testing the circuit.  I briefly toyed with the idea of adding a current mirror to the bottom half of the bias network which would remove R5 and R6 and add a fifth transistor but decided against it as I wasn’t quite sure if I could maintain reliable operation by doing so.  Instead, I called it a day, happy that I had successfully challenged myself to build a better circuit.

As a final helpful hint to anyone looking to build this circuit, pay careful attention to how you layout the latch on your breadboard.  Keep your jumpers wires and component leads as short as possible to avoid accidental shorts and reduce any coupling between nodes that may take place. Even though my improved designs functioned much better than the original they still were sensitive to disturbances on their nodes.  While testing the circuit in Figure 4 I rarely, if ever, experienced false triggers when simply pressing the pushbutton after I applied power but probing a node with my multimeter would often be enough to trip the latch and have it turn on.  Other than that, good luck!


Transistor Latching Circuits: Initial Hardware Attempt

In the first part of what’s fast becoming a novel of a blog post I discussed some of the theory behind the transistor latch circuit demonstrated by Dino at Hack A Week back in August.  In this section I’ll discuss what happened when I first attempted to get the circuit working myself. 

Figure 1: Initial BJT Latch Circuit

Here’s a quick recap of what was covered so far about Figure 1:

~ Instead of the BC547 and BC557 BJTs used by Dino I had to use 2N3904s and 2N3906s because that’s all I have available.

~ When C1 is charged pressing the pushbutton switch will cause the LED to latch on.  Pressing the pushbutton when C1 is discharged turns the LED off.

~ The area in the yellow box can be views as a bias network similar to one that may be used on an IC.  It has two desired state of operation, off and on which is why it was chosen for a latching circuit.

~The rest of the circuit forms a start up/shut off circuit which is used to snap the bias network into either one of its two states of operation.

Immediately upon firing up the circuit once it was breadboarded I saw a problem.  The LED lit right away and pressing the switch did nothing to turn it on or off (though occasionally it would flicker).  Probing the circuit with my multimeter I discovered that something was causing the three transistors to turn on independently of whether or not the pushbutton was pressed.  All three VBE voltages (VEB technically for Q3) were sitting solidly at 0.7 V which was more than enough to turn them on.  Checking the voltage on C1 showed it to be in the low millivolt  range which could be expected since Q2 was turned on.

In order to check for an error on my part when wiring the circuit together I then broke it up into three separate networks and tested each one individually. Network 1 consisted of the start up circuitry Q2, R1, R2, R3, and C1 which on its own properly charged and discharged the cap when Q2′s base was tied low or high.  Networks 2 and 3 were each a single string of the bias network with the bases of each transistor kept floating for testing purposes.  The LED load and pushbutton were removed during these tests.  On their own, each section of the circuit worked as I expected it to and it was only when the entire circuit was wired together that something was going wrong.

Leafing through Chapter 4 of Gray and Meyer again I recalled that these types of bias networks operated as a positive feedback loop. Basically, all it takes is a small disturbance on one of its nodes to cause it to turn fully on. The addition of a start up circuit is merely insurance that the small disturbance occurs every time power is applied.  Okay, I thought, what could be disturbing a node so much that the circuit would self start?  Perhaps it was the way I was applying power, some initial surge of current?  I had a 9V battery with a snap connector from Radio Shack on it to connect the battery to my breadboard and was just plugging and unplugging the positive lead when I wanted the circuit on or off, maybe that was doing it?  I tried slapping a few 1µF bypass caps to the 9V rail to improve circuit by smoothing out any initial pulses. It didn’t work but proper bypassing is always good practice so I left the capacitors on the board anyways.

At this point I was getting stumped so I started going back over each piece of the circuit again looking for clues. Something was nagging me about Q3 and R8 (outlined in green in Figure 1) but I couldn’t quite place it.  Lifting the one end of R8 from the 9V rail caused the LED to turn off but as soon it was reconnected, the LED would instantly turn on.  Ah ha! Something I could work with.  I began to suspect leakage current at this point. My theory was perhaps the base of Q3 was pulling current from the battery through R8 even though the circuit was supposed to be off.  This would cause a voltage to be dropped across R8 which might turn Q3 on just enough for the circuit to drive itself out of the off state.  Making R8 smaller should help alleviate this problem, less resistance, less voltage drop, and Q3 is not turned on as much.  I tried various values of R8 between 1kΩ and 1MΩ before finding a sweet spot between 30kΩ and 50kΩ.  Less than 30kΩ and the circuit would never turn on, greater than 50kΩ and it would never turn off.  Even in the sweet spot however the circuit was finicky and would often refuse function properly.  I had improved things but I still wasn’t satisfied.

To further try to prove my theory I studied the datasheets of the BC557 and the 2N3906.   I was thinking that Dino’s transistors had to be drawing less base current than mine which would explain why most of the time his circuit was working and mine wasn’t.  Sure enough the 3906 was drawing just over 3 times as much current in the off state than the 557 (see Figure 2 below).  As far as I could tell, the increase in off-current for the 3906 was enough to barely turn on Q3 which would then cause the positive feedback of the bias network to drive the circuit fully on.  Feeling validated, I then set out to improve upon the circuit with the components I had available…

Figure 2: Off State Base Current Comparision


Transistor Latching Circuits: Theory

Back in August Dino published a latching circuit made from BJTs over at his blog Hack A Week.  In his video Dino made a comment or two on how the circuit was a little finicky and adding a capacitor from the +9 V rail to the output node seemed to help things though he didn’t understand why.  I took an interest in the circuit and spent some time prototyping and refining the design.  I did succeed in tweaking the circuit for the better but I never did figure out why Dino needed the extra cap in his build. During my tests I found no difference in performance by having the capacitor in place and so it’s labeled as an optional component in my schematics. Read on for my analysis on the transistor latch.

Figure 1: BJT Latch Circuit

Figure 1 displays my initial attempt to copy Dino’s latch circuit; I didn’t have any BC547 or BC557 BJTs on hand when breadboarding the circuit so I turned to the ever popular 2N3904 and 2N3906 instead.  Ignoring the two colored boxes for now let’s discuss how the circuit is supposed to operate.  When power is first applied all three of the transistors are off and the LED on the output is unlit as both it’s anode and cathode are at 9V (Q2 being off causes the output at it’s collector to rise to 9V through the two pull up resistors).  Capacitor C1 also begins to charge to 9V through the two 470kΩ resistors R1 and R2.  Toggling the pushbutton switch momentarily causes the voltage across R5 to be equal to that of C1 which causes Q1 to turn on.  Q1′s collector is then pulled low which pulls the base of Q3 low turning it on.  The LED, with its cathode now close to ground, turns on. Q3′s collector is now close to the supply voltage turning on Q2.  At this point the voltage at the R5-R6 node is high enough to keep Q1 turned on and the circuit “latches” keeping the LED on.  With Q2 turned on, C1 discharges through R2 and eventually sits at 0V.  Toggling the switch again pulls Q1′s base low turning it off and causing a domino effect around the loop, latching the circuit in the off state.

My first impression upon studying this circuit was that closely resembled a bias network that I had seen in my IC design classes at school and so I went to my stack of books to refresh myself.  Sure enough, in Chapter 4 of Gray and Meyer there were all sorts of circuits that were similar in form to the yellow boxed in section of Figure 1.  It was official, the yellow boxed in area is a form of bias network which would be used in IC design as a support circuit so to speak to develop a key voltage or current needed to bias a transistor along the signal path somewhere else on chip.

The rest of the components form what’s known as a start up circuit.  Bias circuits themselves tend to have two different operating points; one is the operating point set by the designer and the second is off.  When designing an IC, having it fail to turn on when power is applied is generally a bad thing.  Start up circuits are used to prevent this from happening by providing a temporary kick to one the nodes in the bias circuitry before shutting themselves off.  After this initial disturbance, the bias network turns itself full on via positive feedback found inherently in the bias loop itself.  In an actual IC the pushbutton switch and Q3 could be replaced with a single diode and C1 replaced with a string of diodes but that’s a post for another time.  The circuit in Figure 1 requires the user, through the form of the pushbutton, to provide the needed kick from the start up circuit to get the bias network of Q1, Q3, and associated resistors to the desired operating point, though I guess in this case it would be a start up, shut off circuit…

Well this post has certainly turned into a much longer article than I expected it to. I haven’t even begun to talk about the actual results I got in hardware. I guess I have a lot to say about the intricacies of transistor circuits.  Sorry, it’s kinda my thing.  I realize that I kind of glossed over how positive feedback affects the bias loop but the actual analysis is rather in-depth, complicated, and involves a lot small signal analysis (I don’t know if I fully understand more than the basics of it myself either).  Hopefully I’ve made my descriptions relatively clear, if not just let me know and I’ll attempt to fix them.  I’ll discuss the hardware results in a new post to break things up a bit.


Filter Fiasco: Chapter 2

For those of you that missed it, Chapter 1 of this saga can be found here.

We left off with the initial simulations looking peachy keen and me feeling hopeful that the hardware implementation would work. However, as these things usually go, the first time I fired the filter up nothing worked right. From Figure 1 below you can see nothing really met spec other than the response was bandpass shaped.  The center frequency for a single stage was 9 MHz rather than 10 MHz, the attenuation was much less steep then expected, and where the heck did the gain go?

Figure 1: Frequency Response of 1st BPF Stage

Clearly something was wrong and I spent a few days trying to figure out what exactly that was.  Going back to my simulation I started to “beat on it” as one of my professors would say.  I stuck small capacitors to ground (~10 pF) on various nodes to simulate board parasitics and watched the Bode response change. Sure enough, the input nodes to the op amps  were very sensitive to parasitic capacitance and I was able to reproduce the terrible response I was seeing on the spectrum analyzer.  Being somewhat stupid and inexperienced I had unfortunately decided to go against the datasheet’s suggestion on page 20 to remove ground planes from beneath the amplifier.

I didn’t have the option of ordering a new revision of the board so in order to fix the problem I had to get creative.  Eventually I went to ask the director of the surface mount soldering lab if he had any suggestions on the best way to partially remove my unwanted ground plane.  His suggestion, mill it out by hand using the small drill press in the lab.

Figure 2: My Operating Table

With sweaty palms and a beating heart I carefully began to mill out the ground plane beneath each of the three filter stages on my board.  Did I mention that I left the components on while do this? Well I did and the whole time I was working I was terrified that I’d drill straight through an op amp ruining the both the part and the PCB. Probably not the smartest thing I’ve ever done but after a few minutes I emerged victorious. Now to retest the filter and see if it would cooperate.

Figure 3: PCB Bottom Post Drilling

Sadly, things were still pretty crappy the second time around. I forgot to grab a scope capture of the response but it was pretty similar to Figure 1 only the passband was a few dB lower than seen there. It appeared my efforts had been for naught and having exhausted all ideas I could think of I decided to hit the books to see what was really going on in my circuit.

Stay tuned for the Chapter 3 for the stunning conclusion. I promise I will have it out much sooner than it took to get Chapter 2 out.


A Call to Arms

I’m sure it’s not news anymore to most of the readers here but recently there has been not one, but two devastating blows to the analog electronics industry.  Legendary Linear Tech Applications Engineer Jim Williams passed away on June 10, 2011 and National Semiconductor’s Analog Wizard Bob Pease (the self crowned Czar of Bandgaps) also passed away on June 18, 2011.   EDN author and fellow analog engineer Paul Rako fondly remembers both analog giants in two heartfelt posts on EDN’s website here and here. You can also find a tribute to Williams on Linear Tech’s website (found here) which also links to a collection of his app note guaranteed to provide you with enough reading material for the foreseeable future. [Update] National Semi has also added a tribute to Bob Pease on their website found here.  There’s an excellent video to go along with it that’s well worth the time to watch it (if anyone from Maxim is reading I apologize but your product catalog as Pease’s floor mat was pretty funny).

No one can deny that their unexpected passing is a blow to EE’s everywhere and both men will be greatly missed.  It is unlikely that either Williams or Pease will ever be replaced. In his article on Pease, Rako mentions that there are still many great analog designers in the industry today and while I agree with him, I do claim that we as an industry are currently left with a void to fill in terms of engineers who are as vocal as both Pease and Williams were.  There is now a need for engineers and makers who possess the same passion as these two great men to step up and inspire and teach others with their writing.

My challenge to not only analog fans but all engineers, coders, makers, hackers, etc. is to carry on where Jim Williams and Bob Pease left off.  Be passionate about your work, take pride in it.  Look to teach. Look to inspire. Let your enthusiasm show through in every project. Let people know what we do as engineers may not be easy but the challenge it provides is both exhilarating and at times, fun.  These are the ideals that should be present each and every day you sit down at your bench. You don’t have to be a circuit junky to see  these principles shine through in Williams’ and Pease’s work, they’re pretty self-evident.

So grab your ‘scopes, grab your dev boards, your MakerBots, and your soldering irons (not by the hot end). Take them and make something.  If you’re not a maker, write an article on a bit of theory you’re knowledgeable on or just any topic that interests you.  Throw the results online for others to see be it in your own blog, an Instructable, up on Hack a Day, YouTube, whatever.  Carry on the legacies of passion, knowledge, and dedication left behind by Jim Williams and Bob Pease.  While they can’t be replaced, their memories can be honored through the work of those they inspired.

Sadly, I never had the opportunity to meet nor work with either Pease or Williams. However, the two have inspired me immensely through their countless publications.  Ever since I first stumbled across The Best of Bob Pease on National’s website and Analog Circuit Design: Art, Science and Personalities  a few years ago I’ve been hooked on reading everything these two have put into print.  Both of them have taught me a great deal on not only analog circuits, but also the passion required for really loving the work that you do.  As I prepare to go off into the real world after summer ends and start my own career as an apps engineer, I hope that perhaps one day a few of my own app notes can be as well regarded as those written by Williams and Pease and can inspire budding EE’s the way they have inspired me.

To Jim Williams and Bob Pease, may they rest in peace…


Filter Fiasco: Chapter 1

One of the circuits I have to design for my thesis is a bandpass filter.  Based off the specs I was presented with back in the early fall a filter with f_center = 100 MHz and Q = 250 was required; plus f_center needed to be tunable without changing Q. Not exactly the easiest design in the world but I studied up on a few topologies and settled on the Dual Amplifier Bandpass filter (pages 5.74 and 5.93).  According to Matlab and some hand calculations a 4th order filter was all I needed.

Figure 1: Dual Amplifier Bandpass Filter Schematic

Cut to Rev. 1 of the board and not a single aspect of the filter met spec or even remotely functioned as a bandpass filter.  Simply scoping the output showed my design self-oscillated around 50 MHz, fantastic.  Adjusting the potentiometer I put in place for R2 merely shifted the frequency of oscillation. No amount of debugging or rework could make the filter behave and according to one of my professors, my use pots in the first place was a recipe for disaster because of high parasitics along with poor overall performance at high frequencies. Another important thing to note was my use of a current feedback amplifier as opposed to a conventional voltage feedback amp  because of the higher bandwidth and slew rate they offer at high frequencies (foreshadowing, this will haunt me later on…).

After discussing things with my advisor we decided our first attempt was too ambitious and to spin a second revision of the board only this time with a few changes in the specs.  Mercifully, having a tunable center frequency was no longer required. It was determined that this feature wasn’t necessary in the prototype stage and that designing a new tuning method would take too much effort, thus preventing me from completing more important aspects of the project.  The center frequency was also dropped to 10 MHz which lowered Q down to 25 giving a much more achievable design.  Refining my Matlab simulations and hand calculations showed that I was actually incorrect on my first attempt (whoops) in regards to the number of stages.  With these new specs I would need a sixth order filter.  I decided to keep using a current feedback amplifier though I changed parts from Rev 1 and picked the THS3202 from TI.

With my first design having crashed and burned I turned to PSpice to see if I could get my design working in simulation before spending time in hardware chasing something that may prove to be a dead end.  Using  Intersil’s AN1613 (mentioned in my last post here) I downloaded the Spice model for the THS3202 from TI’s website, incorporated it into my schematic and began simulating.  I eventually got my filter working and meeting spec with the help of some compensation techniques from other app notes I discovered and got the results below in Figures 2 and 3.

BPF Mag Plot

Figure 2: Magnitude Plot of BPF

BPF Current Pulse Response

Figure 3: Vout of BPF to Current Pulse Input

From these figures everything appears to be in order, there’s a nice bandpass shape to the filter that met spec, a decent response to being hit with a 100 uA current pulse for 30 us, yadda yadda. All that should have been left was to slap it on a PCB and make sure it functioned right?  Stay tuned for Chapter 2 as our story continues…


The Poor Man’s RF Probes

While working on my thesis I often have to measure signals up into 2.45 GHz range be it testing a mixer or determining the transfer function of a filter.  At such high frequencies standard banana jack or alligator clip cables turn into antennas which render any measurements done with them pretty much useless.  I get around this inconvenience by using what the engineers I worked with last summer called “Poor Man’s RF Probes.”  These probes are very easy to use and you can make a pair of your own for $10 assuming you already have shielded BNC to SMA cables and a few SMA billets.  Semi-rigid SMA male to male cables are used to make the probes themselves; here’s a link to the ones that I’m using. There may be cheaper cables out there and if you can find them I’d love to hear about it but in order to make the probes the outer jacket needs to be exposed in order to solder it directly to ground.

To make the probes themselves first cut the semi-rigid cable just below each SMA jack leaving a small amount of shielded cable to strip.  Figure 1 below shows two of the probes I am using at the moment next to an uncut cable and a Digi-Key label for reference.  Each probe is just over an inch long or so giving me enough room to strip the ends and bend the probe as needed while still keeping the overall length short enough to ensure quality measurements.

Figure 1: Semi-Rigid SMA Cable Cut to Length

When stripping the cut cable, I’ve found the easiest way to strip the rigid outer jacket is to use needle nose pliers.  Gripping the end of the jacket with the tip of the pliers and slowly bending it back and forth a few times is usually enough to cause the jacket to break all the way around the cable and you can then just slip it off leaving the center conductor insulator exposed.  The center conductor insulator can be stripped using standard wire strippers (~ 20 Gauge).  The goal is to minimize the amount of exposed center conductor keeping the probe close to the measurement point. I recommend practicing on the unusable  middle portion of the cable that will be left over to get the hang of it before stripping the probes themselves.

Once you get the probes themselves made, figure out where you’re actually placing the probes on your board next. Look for a relatively open area of ground plane close to the pad where you will be measuring from.  Bending the stripped probe slightly is necessary for both a good ground connection and the probe’s mechanical stability.  Note: It’s possible to snap the center conductor from too much bending resulting in a useless probe that will only cause headaches later on so bend with care.

Once you’ve determined where you are going to solder down the probe, use a hobby knife or similar tool and carefully scrape away the solder mask on the ground plane near the measurement site.  Be gentle but firm when scrapping because gouging the board too deeply could short the ground plane to any internal layers that might be in your board.  Figure 2 shows what the site around the input to my filter where I’m placing the probe.  In the picture, I’m placing the conductor of the probe on the unpopulated pad of R2 making use of the 0Ω resistor trick.

My apologies for the so-so photo quality during the remainder of this post; my camera phone only works so well…

Figure 2: Scraped GND Plane Solder Mask Near Probe Site

The third step of the process is to solder down the center conductor of the stripped SMA cable. Usually I’ll tin the pad with a little solder before placing the probe, blob some solder on the iron and while holding the probe in my fingers, tack solder the center pin down (Figure 3).  Note: The probe should be able to stand on its own right now but I wouldn’t move the board or probe too much as you could lift the pad the center conductor is soldered down to.

Figure 3: Tack Soldered Center Conductor

The next to last step is to solder the exposed ground plane to the outer metal jacket of the probe for a solid ground connection.  This will also make the probe mechanically sound so you can now make sure the center conductor is properly soldered down without worry. Note: This step can be done before the previous step if you so choose.  Just don’t be like me and hold the probe with your fingers because if you’re not quick you get burned.  I find this method easier as it make shorting the center conductor to ground less likely.

Figure 4: Soldered Ground Connection

Finally before you can consider yourself done, use a multi-meter and make a quick continuity check. Be sure the center conductor is not shorted to ground and that it is actually connecting to the node you would like it to.  Note: If you have to desolder the probe because of a short or to remove it altogether desolder the center conductor first to avoid lifting the pad.

If you treat these probes with a little care they should last you long enough to justify their cost.  After enough wear and tear though they will become unusable and have to be replaced.  I’ve been using the same two probes for over six months now with no lose in measurement quality and they’ve been removed and resoldered quite a few times.  Before each use however, I do recommend checking the continuity of the center conductor just to be sure it’s still good. Troubleshooting a bad probe isn’t exactly fun and can make you lose your hair when your circuit mysteriously stops working.

Figure 5: Final Probe Placement for Filter Testing


Follow

Get every new post delivered to your Inbox.