Tag Archives: Debugging

Filter Fiasco: Chapter 2

For those of you that missed it, Chapter 1 of this saga can be found here.

We left off with the initial simulations looking peachy keen and me feeling hopeful that the hardware implementation would work. However, as these things usually go, the first time I fired the filter up nothing worked right. From Figure 1 below you can see nothing really met spec other than the response was bandpass shaped.  The center frequency for a single stage was 9 MHz rather than 10 MHz, the attenuation was much less steep then expected, and where the heck did the gain go?

Figure 1: Frequency Response of 1st BPF Stage

Clearly something was wrong and I spent a few days trying to figure out what exactly that was.  Going back to my simulation I started to “beat on it” as one of my professors would say.  I stuck small capacitors to ground (~10 pF) on various nodes to simulate board parasitics and watched the Bode response change. Sure enough, the input nodes to the op amps  were very sensitive to parasitic capacitance and I was able to reproduce the terrible response I was seeing on the spectrum analyzer.  Being somewhat stupid and inexperienced I had unfortunately decided to go against the datasheet’s suggestion on page 20 to remove ground planes from beneath the amplifier.

I didn’t have the option of ordering a new revision of the board so in order to fix the problem I had to get creative.  Eventually I went to ask the director of the surface mount soldering lab if he had any suggestions on the best way to partially remove my unwanted ground plane.  His suggestion, mill it out by hand using the small drill press in the lab.

Figure 2: My Operating Table

With sweaty palms and a beating heart I carefully began to mill out the ground plane beneath each of the three filter stages on my board.  Did I mention that I left the components on while do this? Well I did and the whole time I was working I was terrified that I’d drill straight through an op amp ruining the both the part and the PCB. Probably not the smartest thing I’ve ever done but after a few minutes I emerged victorious. Now to retest the filter and see if it would cooperate.

Figure 3: PCB Bottom Post Drilling

Sadly, things were still pretty crappy the second time around. I forgot to grab a scope capture of the response but it was pretty similar to Figure 1 only the passband was a few dB lower than seen there. It appeared my efforts had been for naught and having exhausted all ideas I could think of I decided to hit the books to see what was really going on in my circuit.

Stay tuned for the Chapter 3 for the stunning conclusion. I promise I will have it out much sooner than it took to get Chapter 2 out.

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Filter Fiasco: Chapter 1

One of the circuits I have to design for my thesis is a bandpass filter.  Based off the specs I was presented with back in the early fall a filter with f_center = 100 MHz and Q = 250 was required; plus f_center needed to be tunable without changing Q. Not exactly the easiest design in the world but I studied up on a few topologies and settled on the Dual Amplifier Bandpass filter (pages 5.74 and 5.93).  According to Matlab and some hand calculations a 4th order filter was all I needed.

Figure 1: Dual Amplifier Bandpass Filter Schematic

Cut to Rev. 1 of the board and not a single aspect of the filter met spec or even remotely functioned as a bandpass filter.  Simply scoping the output showed my design self-oscillated around 50 MHz, fantastic.  Adjusting the potentiometer I put in place for R2 merely shifted the frequency of oscillation. No amount of debugging or rework could make the filter behave and according to one of my professors, my use pots in the first place was a recipe for disaster because of high parasitics along with poor overall performance at high frequencies. Another important thing to note was my use of a current feedback amplifier as opposed to a conventional voltage feedback amp  because of the higher bandwidth and slew rate they offer at high frequencies (foreshadowing, this will haunt me later on…).

After discussing things with my advisor we decided our first attempt was too ambitious and to spin a second revision of the board only this time with a few changes in the specs.  Mercifully, having a tunable center frequency was no longer required. It was determined that this feature wasn’t necessary in the prototype stage and that designing a new tuning method would take too much effort, thus preventing me from completing more important aspects of the project.  The center frequency was also dropped to 10 MHz which lowered Q down to 25 giving a much more achievable design.  Refining my Matlab simulations and hand calculations showed that I was actually incorrect on my first attempt (whoops) in regards to the number of stages.  With these new specs I would need a sixth order filter.  I decided to keep using a current feedback amplifier though I changed parts from Rev 1 and picked the THS3202 from TI.

With my first design having crashed and burned I turned to PSpice to see if I could get my design working in simulation before spending time in hardware chasing something that may prove to be a dead end.  Using  Intersil’s AN1613 (mentioned in my last post here) I downloaded the Spice model for the THS3202 from TI’s website, incorporated it into my schematic and began simulating.  I eventually got my filter working and meeting spec with the help of some compensation techniques from other app notes I discovered and got the results below in Figures 2 and 3.

BPF Mag Plot

Figure 2: Magnitude Plot of BPF

BPF Current Pulse Response

Figure 3: Vout of BPF to Current Pulse Input

From these figures everything appears to be in order, there’s a nice bandpass shape to the filter that met spec, a decent response to being hit with a 100 uA current pulse for 30 us, yadda yadda. All that should have been left was to slap it on a PCB and make sure it functioned right?  Stay tuned for Chapter 2 as our story continues…


The Value of 0 Ω

I learned the value of 0 Ω resistors while on co-op during the summer and fall of 2008.  My official title was NPI (New Product Introduction) Electrical Intern and I worked in the department in charge of transitioning new products from the R&D stage to production.  My responsibilities included building and documenting the electrical test fixtures that were used out on the production floor to test products at various stages of completion. Being at the end of my second of five years in school, I knew very little about anything at the time, and this being my first real world engineering experience, I was not the one who designed these fixtures.

However, being able to work with the man who did design the circuitry for these fixtures was, I can honestly say, awesome.  Over the six months I worked with him I came to think of his as the Yoda of circuit design. He was an old-time analog guru and I have no idea how long he’s been designing circuits but it seemed like he knew everything. Whenever there was a complex board to test or debug Yoda and I would sit together in his cube,measuring various voltages and what not and he would always patiently explain to me how something worked or why a certain portion of the layout had to be a certain way. I learned a lot from Yoda about design and troubleshooting, but my favorite trick he used was to stick 0 Ω resistors and unpopulated passive component footprints in key areas all over the board.

Figure 1: Example Circuit of Yoda's Techniques

Figure 1 above shows an example circuit containing the techniques I learned from Yoda.  Capacitor C1 and Resistor R3 would be marked NP, for Non-Populated, on the schematic by Yoda indicating to myself that the components were not to be soldered down when building the board.  If, when checking output of the op-amp stage, the output looked a little noisy, placing a capacitor in the feedback path to filter out noise above a certain frequency wouldn’t require a complex rework. The component was simply soldered down on the empty pads and testing could continue.

As testing would go on for the op-amp stage, the empty pads where R3 should be were convenient places to place a multi-meter or oscilloscope probe.  Only after the op-amp was working correctly would I be told to solder a 0 Ω resistor in place for R3 and testing would then continue on down the signal chain.

When it came time to finalize the schematic, if C1 was needed, its value would be inserted into the schematic and the NP marker removed, otherwise it would be deleted.  R3 was typically left in place because if a problem arose with U1 in the future the resistor could simply be tombstoned, thus isolating the op-amp from the rest of the circuit for testing.  This in and of itself was a useful debugging technique for if the problem disappeared after removing R3 then we knew something down the line was affecting the loading on U1 and the op-amp was probably fine.

Another thing I admired Yoda for was that he always came up with multiple circuit blocks to implement a desired function.  The two or three most feasible of these blocks would be placed on the test fixture PCB in parallel with each other and 0 Ω resistors were put in series with their inputs and outputs as shown below in Figure 2.  His most likely choice for that given feature was soldered down first and tested.  Should that block not perform to spec, time was saved because the PCB did not need to be re-spun, just move the 0 Ω’s to an auxiliary block and keep going.

Figure 2: Another Example of Yoda's Techniques

Yoda got away with this because most of the time there wasn’t a tight area requirement for the test fixtures. Placing an extra op-amp or two on the board could be done with only a minimal cost increase.  Typically, electrical components went into a standard sized project box that was machined with the proper holes for connectors and any other mechanical parts and that was about it.  So long as the PCB fit in the box all was good.  This freedom to experiment with new and/or different options for various circuits not only made testing and debugging easier, it also made Yoda a better designer because when it came time to design a new product and its required test fixtures, he already had a sense on what type of circuit might work for a given application.

While these techniques may seem like common sense, I for one am glad I got to learn about them while out in the field. The use of 0 Ω resistors and empty pads in key places are not the type of topics that get covered in core EE courses and I probably would not have learned them otherwise while in school. Currently, I am making great use of these techniques while designing and testing the circuit for my thesis. Having these tricks up my sleeve has been quite handy during the whole process.  Thanks Yoda.