Circuit Notes – Part 2

For my second Circuit Notes entry I decided to go with the Wien Bridge Oscillator. This time around the math wasn’t as intensive as it was for the Type III compensation with one exception. I had originally got the right answer in my derivation but had made a math error in the final step that I caught while writing in my Field Notes book. When I corrected the mistake I no longer knew how to make the math work out to give the correct output voltage at the resonant frequency. Wikipedia helped some by claiming RC was normalized to 1 but didn’t state why and I still don’t know. Is it just to make the math easier or is there a deeper reason for doing so?

Maybe college me could figure it out but present me is a tad rusty and so that last step is left as an exercise to the readers. I’ll keep digging and post an update if I find it or someone can correct me. Either way, the Evernote link can be found here and if you have any recommendations for a circuit you’d like to see analyzed feel free to send them my way.

References:

http://en.wikipedia.org/wiki/Wien_bridge_oscillator

The Wien Bridge Oscillator

Transistor Latching Circuits: Improvement

This journey began back in Part 1 with me discussing the theory behind the transistor latch used by Dino at Hack a Week back in August.  Next it progressed to recreating Dino’s circuit using components I had on hand in Part 2.  Originally, the circuit I built didn’t work at all and I was able to narrow the problem down to leakage current in the base of the transistors.  Knowing what I was up against finally, our story concludes as I set out to improve upon the latching circuit.

Figure 3: Transistor Latch Using FETs

Figure 3 shows my first method of improving the transistor latch, losing the BJTs all together.  Since the 2N3904s and 2N3906s were drawing too much leakage current in the first place and setting off the latch randomly I decide they had to go.  What type of transistor could I use instead of a BJT that draws little to no leakage current?  Why a MOSFET of course. The gate leakage current of the only FETs I had on hand, the ALD1103 transistor array, was spec’d between 1 and 50pA, orders of magnitude less than the BJTs used before.  Surely such a small current wouldn’t cause the latch to turn on when it wasn’t supposed to.  After breadboarding the revised circuit using the ALD1103 I found that the circuit was much more consistent in its operation.  The only real changes to the circuit I had to make were the addition of bypass caps on the supply (not shown above, sorry) and tweaking the value of R8 (boxed in blue above) to 39kΩ.  While the latch worked well enough keeping R8 at 1MΩ I found that lowering its value caused many less false triggers.

Now that I had a functioning latch finally I decided to challenge myself. I wanted to see if I could go back and make a working latch using the “inferior” BJTs.  There were a few ideas floating around in my head on how to go about doing such a thing and Figure 4 below gives my best solution.  Since the base leakage current from Q3 through the 1MΩ resistor was causing most, if not all, of my problems the first time around my focus was now to minimize the effect that leakage could have on the overall operation of the circuit.

Figure 4: Improved Latch Using BJTs

Looking at Figure 4, one can see that R8 has been replaced with a fourth BJT.  Q3 and Q4 (boxed in orange above) form what’s called a simple current mirror (or current source depending on how you want to look at things but I digress) with Q4 configured as a diode connected transistor.  Note that when adding the simple current mirror to the latch the diode connected transistor MUST be located where Q4 is in the circuit.  With the diode connection Q4 acts like a standard diode with its anode at 9V meaning that at least in this application, it always looks forward biased. Diode connecting Q3 instead gives a constant path for current to flow from 9V to ground (via diode connected Q3, R4, and R5) and so the circuit will never turn off.  In an IC this would mean that a start up circuit would be unnecessary (typically a good thing) but in the case of the latch that’s exactly the opposite of what we want.  Placing the diode connection on Q4 means that even though it looks forward biased, current doesn’t flow through that branch of the bias network since the collector of Q1 would float high as Q1 itself is turned off.

Powering up this new circuit showed great improvement over my previous attempts to build a latch using BJTs.  Most of the time the latch was only triggering when I toggled the pushbutton.  With the main leakage problem taken care of I then began to look at Q1.  Ignoring R6 for a moment, Q1 looked an awful lot like how Q3 was configured with the 1MΩ resistor back in Figure 1 which had me thinking about leakage through this transistor.  Reducing the resistance of R5 down to 56kΩ (via trial and error) further improved the circuit’s reliability and I hardly ever saw a false trigger when testing the circuit.  I briefly toyed with the idea of adding a current mirror to the bottom half of the bias network which would remove R5 and R6 and add a fifth transistor but decided against it as I wasn’t quite sure if I could maintain reliable operation by doing so.  Instead, I called it a day, happy that I had successfully challenged myself to build a better circuit.

As a final helpful hint to anyone looking to build this circuit, pay careful attention to how you layout the latch on your breadboard.  Keep your jumpers wires and component leads as short as possible to avoid accidental shorts and reduce any coupling between nodes that may take place. Even though my improved designs functioned much better than the original they still were sensitive to disturbances on their nodes.  While testing the circuit in Figure 4 I rarely, if ever, experienced false triggers when simply pressing the pushbutton after I applied power but probing a node with my multimeter would often be enough to trip the latch and have it turn on.  Other than that, good luck!

Transistor Latching Circuits: Theory

Back in August Dino published a latching circuit made from BJTs over at his blog Hack A Week.  In his video Dino made a comment or two on how the circuit was a little finicky and adding a capacitor from the +9 V rail to the output node seemed to help things though he didn’t understand why.  I took an interest in the circuit and spent some time prototyping and refining the design.  I did succeed in tweaking the circuit for the better but I never did figure out why Dino needed the extra cap in his build. During my tests I found no difference in performance by having the capacitor in place and so it’s labeled as an optional component in my schematics. Read on for my analysis on the transistor latch.

Figure 1: BJT Latch Circuit

Figure 1 displays my initial attempt to copy Dino’s latch circuit; I didn’t have any BC547 or BC557 BJTs on hand when breadboarding the circuit so I turned to the ever popular 2N3904 and 2N3906 instead.  Ignoring the two colored boxes for now let’s discuss how the circuit is supposed to operate.  When power is first applied all three of the transistors are off and the LED on the output is unlit as both it’s anode and cathode are at 9V (Q2 being off causes the output at it’s collector to rise to 9V through the two pull up resistors).  Capacitor C1 also begins to charge to 9V through the two 470kΩ resistors R1 and R2.  Toggling the pushbutton switch momentarily causes the voltage across R5 to be equal to that of C1 which causes Q1 to turn on.  Q1’s collector is then pulled low which pulls the base of Q3 low turning it on.  The LED, with its cathode now close to ground, turns on. Q3’s collector is now close to the supply voltage turning on Q2.  At this point the voltage at the R5-R6 node is high enough to keep Q1 turned on and the circuit “latches” keeping the LED on.  With Q2 turned on, C1 discharges through R2 and eventually sits at 0V.  Toggling the switch again pulls Q1’s base low turning it off and causing a domino effect around the loop, latching the circuit in the off state.

My first impression upon studying this circuit was that closely resembled a bias network that I had seen in my IC design classes at school and so I went to my stack of books to refresh myself.  Sure enough, in Chapter 4 of Gray and Meyer there were all sorts of circuits that were similar in form to the yellow boxed in section of Figure 1.  It was official, the yellow boxed in area is a form of bias network which would be used in IC design as a support circuit so to speak to develop a key voltage or current needed to bias a transistor along the signal path somewhere else on chip.

The rest of the components form what’s known as a start up circuit.  Bias circuits themselves tend to have two different operating points; one is the operating point set by the designer and the second is off.  When designing an IC, having it fail to turn on when power is applied is generally a bad thing.  Start up circuits are used to prevent this from happening by providing a temporary kick to one the nodes in the bias circuitry before shutting themselves off.  After this initial disturbance, the bias network turns itself full on via positive feedback found inherently in the bias loop itself.  In an actual IC the pushbutton switch and Q3 could be replaced with a single diode and C1 replaced with a string of diodes but that’s a post for another time.  The circuit in Figure 1 requires the user, through the form of the pushbutton, to provide the needed kick from the start up circuit to get the bias network of Q1, Q3, and associated resistors to the desired operating point, though I guess in this case it would be a start up, shut off circuit…

Well this post has certainly turned into a much longer article than I expected it to. I haven’t even begun to talk about the actual results I got in hardware. I guess I have a lot to say about the intricacies of transistor circuits.  Sorry, it’s kinda my thing.  I realize that I kind of glossed over how positive feedback affects the bias loop but the actual analysis is rather in-depth, complicated, and involves a lot small signal analysis (I don’t know if I fully understand more than the basics of it myself either).  Hopefully I’ve made my descriptions relatively clear, if not just let me know and I’ll attempt to fix them.  I’ll discuss the hardware results in a new post to break things up a bit.